The present invention relates to a plasma display apparatus. More particularly, the present invention relates to a power saving technique for a plasma display apparatus.
The plasma display apparatus has been put to practical use as a plane display and is a thin display with high luminance. FIG. 1 is a diagram that shows the general configuration of a conventional three-electrode AC-driven plasma display apparatus. As shown schematically, the plasma display apparatus comprises a plasma display panel (PDP) 1 composed of two substrates, between which a discharge gas is sealed, each substrate having plural X electrodes (X1, X2, X3, . . . , Xn) and Y electrodes (Y1, Y2, Y3, . . . , Yn) arranged adjacently, plural address electrodes (A1, A2, A3, . . . , Am) arranged in the intersecting direction thereto, and phosphors arranged at the intersections, an address drive circuit 2 that applies pulses such as an address pulse to the address electrode, an X common drive circuit 3 that applies pulses such as a sustain discharge pulse to the X electrode, a scan circuit 4 that applies pulses such as a scan pulse sequentially to the Y electrode, a Y common drive circuit 5 that supplies pulses such as a sustain discharge pulse to be applied to the Y electrode to the scan circuit 4, and a control circuit 6 that controls each part, and the control circuit 6 further comprises a display data control circuit 7 that contains a frame memory and a drive control circuit 8 composed of a scan drive control circuit 9 and a common drive control circuit 10. As the plasma display apparatus is widely known, more detailed description about the general apparatus is omitted here, but only the X common drive circuit 3, the scan circuit 4, and the Y common drive circuit 5 that relate to the present invention are further described.
FIG. 2 is a diagram that shows an example of the conventional configuration of the X common drive circuit 3, the scan circuit 4, and the Y common drive circuit 5. The plural x electrodes are connected commonly and driven by the X common drive circuit 3. The X common drive circuit 3 comprises a voltage source +Vs, a ground (GND), and output elements (transistors) Q7, Q8, and Q9 provided between −Vwx and the common X electrode terminal. A pulse of a voltage that corresponds to the common X electrode terminal is supplied by turning one of the transistors on and off.
The scan circuit 4 is composed of individual drivers provided for each Y electrode and each individual driver comprises transistors Q1, Q2 and diodes D1, D2 provided in parallel thereto. One end of the transistors Q1, Q2 and the diodes D1, D2 of each individual driver is connected to each Y electrode and the other end is connected commonly to the Y common drive circuit 5. A scan pulse is applied sequentially to the gates of the transistors Q1 and Q2. The Y common drive circuit 5 comprises transistors Q3, Q4, Q5, and Q6 provided between a voltage source +Vs, GND, +Vwy, and −Vy, and the transistors Q3, Q5, and Q6 are connected to the transistor Q1 and the diode D1 and the transistor Q4 is connected to the transistor Q2 and the diode D2.
In the reset period, +Vwy is applied to the Y electrode and −Vwx to the electrode by turning Q5 and Q9 on and other transistors off to produce an entire surface write/erase pulse, and the display cells of the panel 1 are brought into an identical state. At this time, the voltage +Vwy is supplied to the Y electrode via Q5 and D1. In the address period, GND is supplied to the X electrode, GND to the terminal of Q2, and −Vy to the terminal of Q1 by turning Q4, Q6, and Q8 on and other transistors off. Further, a scan pulse, which switches the state in which Q1 is turned off and Q2 is turned on to that in which Q1 is temporarily turned on and Q2 is turned off, is supplied sequentially to the individual drivers. At this time, Q1 is turned on and Q2 is turned off in the individual drivers to which the scan pulse is supplied, therefore, −Vy is supplied to the Y electrode, to which the scan pulse is supplied, via Q1, GND is supplied to other Y electrodes via Q2, and an address discharge is caused to occur between the address electrode to which a positive data voltage is supplied and the Y electrode to which the scan pulse is supplied. In this manner, each cell of the panel is brought into a state in accordance with the display data.
In the sustain discharge period, the pair of Q3 and Q8 and that of Q4 and Q7 are turned on alternately, in the state in which Q1, Q2, Q5, Q6, and Q9 are turned off. By this, +Vs and GND are supplied alternately to the Y electrode and the X electrode and a sustain discharge is caused to occur in the cell in which an address discharge has been caused to occur in the address period, thereby a display is achieved. If Q3 is turned on at this moment, +V1 is supplied to the Y electrode via D1, and if Q4 is turned on, GND is supplied to the Y electrode via D2. In other words, pulses of the voltage Vs of the opposite polarity are supplied alternately between the X electrode and the Y electrode in the sustain discharge period. This pulse is referred to the sustain pulse here.
The above is just one example, and there are various examples of modifications to what kind of voltage is applied in the reset period, the address period, and the sustain discharge period. There are also various examples of modification of the scan circuit 4, the Y common drive circuit 5, and the X common drive circuit 3.
Recently, global warming caused by the emission of carbon dioxide is seen as a problem and it is important to reduce the power consumption of devices that use electricity. Therefore, it is an important point to reduce the power consumption of a plasma display apparatus.
What consumes a large power in a plasma display apparatus is the action to supply a pulse to the electrode of the panel. In particular, a sustain pulse consumes much power because it is applied many times to every X electrode and Y electrode alternately. In the above-mentioned conventional plasma display apparatus, the sustain pulse is supplied to every X electrode and Y electrode regardless of the display state of the screen, that is, regardless whether light is emitted or not. By this, a sustain discharge is caused to occur and light is emitted in the image display area. In the non-display area, on the other hand, a sustain discharge is not caused to occur even though the sustain pulse is supplied to the X electrode and the Y electrode, but a charge/discharge current flows through the panel capacitor because the sustain pulse is supplied, and power is consumed. This means that the power consumption due to the sustain pulse to be supplied to the image display area is necessary for the video display, but that due to the sustain pulse to be supplied to the non-display area is reactive power that does not contribute to the video display.
Japanese Unexamined Patent Publication (Kokai) No. 11-190984 has disclosed the technique to reduce such a reactive power. In this technique, power consumption is reduced by detecting whether or not there exists display data in a single field period and terminating the supply of the sustain pulse in fields and subfields where no display data exists. Furthermore, Japanese Unexamined Patent Publication (Kokai) No. 11-190984 has proposed to control the supply of the sustain pulse for each display line by detecting whether or not there exists display data for each display line. Japanese Unexamined Patent Publication (Kokai) No. 11-190984, however, has neither disclosed nor proposed any concrete configuration with which to control the supply of the sustain pulse for each display line.
As described above, in the conventional plasma display apparatus, the configuration is so designed that the sustain pulse is supplied from the X common drive circuit and the Y common drive circuit and supplied simultaneously to every x electrode or Y electrode. Therefore, it is possible to terminate the supply of the sustain pulse when there is no display data on the entire screen, but it is impossible to control the supply of the sustain pulse for each display line when the display data does not exist only on a part of the screen.
Japanese Unexamined Patent Publication (Kokai) No. 2000-89721 has disclosed the technique in which the luminance is improved by lengthening the sustain period by the time saved by the strategy that the scan pulse is supplied only to the display line that has display data and not supplied to the display line that does not have display data by detecting whether or not there exists display data for each display line. A concrete configuration, however, to control the supply of the scan pulse to each display line has neither disclosed nor proposed. Moreover, there has not been any reference in particular to the supply of the sustain pulse.
On the other hand, Japanese Unexamined Patent Publication (Kokai) No. 7-261699 has disclosed a configuration to reduce power consumption in the interlaced plasma display apparatus, in which two of the common drive circuits are provided respectively so that the pair of the odd-numbered x electrode and Y electrode and the pair of the even-numbered X electrode and Y electrode can be driven alternately, and while the sustain pulse is being supplied from one of the circuits, the output of the other circuit is made to enter the high impedance state. This configuration, however, cannot control the supply of the sustain pulse to the desired X electrode and Y electrode.
As described above, no configuration to control the supply of the sustain pulse for each display line is known concerning the conventional technique and it has been impossible to reduce reactive power consumption due to the sustain pulse supplied to the non-display area.